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  6n137/ sfh6741 / 42 / 50 / 51 / 52 document number 82584 rev. 1.8, 13-aug-04 vishay semiconductors www.vishay.com 1 1 2 3 4 8 7 6 5 1 2 3 4 8 7 6 5 n c a c n c v cc v e v o g n d a1 c1 c2 a2 v cc v o1 v o2 g n d single channel dual channel sfh6745t, sfh6746t, sfh6747t sfh6755t, sfh6756t, sfh6757t 1 8 921-3 hi g h speed optocoupler, 10 mbd features ? choice of cmr performance of 10 k v / s, 5 k v / s, and 100 v / s  high speed: 10 mbd typical + 5 v cmos compatibility  guaranteed ac and dc performance over tem- perature: - 40 to + 100 c temp. range  pure tin leads  meets iec60068-2-42 (so 2 ) and iec60068-2-43 (h 2 s) requirements  low input current capability: 5 ma  lead-free component  component in accordance to rohs 2002/95/ec and weee 2002/96/ec a g ency approvals  ul1577, file no. e52744 system code h or j, double protection  cul - file no. e52744, equivalent to csa bulletin 5a  din en 60747-5-2 ( v de0884)  reinforced insulation rating per iec60950 2.10.5.1  v de available with option 1 applications microprocessor system interface plc, ate input/output isolation computer peripheral interface digital fieldbus isolation: cc-link, devicenet, profibus, sds high speed a/d and d/a conversion ac plasma display panel level shifting multiplexed data transmission digital control power supply ground loop elimination description the 6n137, sfh674x and sfh675x are single chan- nel 10 mbd optocouplers utilizing a high efficient input led coupled with an integrated optical photodiode ic detector. the detector has an open drain nmos-tran- sistor output, providing less leakage compared to an open collector schottky clamped transistor output. for the single channel type, an enable function on pin 7 allows the detector to be strobed. the internal shield provides a guaranteed common mode transient immunity of 5 k v / s for the sfh6741 and sfh6751 and 10 k v / s for the sfh6742 and sfh6752. the use of a 0.1 f bypass capacitor connected between pin 5 and 8 is recommended. order information part remarks 6n137 100 v / s, single channel, dip-8 6n137-x006 100 v / s, single channel, dip-8 400 mil (option 6) 6n137-x007 100 v / s, single channel, smd-8 (option 7) sfh6741 5 k v / s, single channel, dip-8 sfh6741-x006 5 k v / s, single channel, dip-8 400 mil (option 6) sfh6741-x007 5 k v / s, single channel, smd-8 (option 7) sfh6742 10 k v / s, single channel, dip-8 sfh6742-x006 10 k v / s, single channel, dip-8 400 mil (option 6) sfh6742-x007 10 k v / s, single channel, smd-8 (option 7) sfh6750 100 v / s, dual channel, dip-8 SFH6750-X006 100 v / s, dual channel, dip-8 400 mil (option 6) sfh6750-x007 100 v / s, dual channel, smd-8 (option 7) sfh6751 5 k v / s, dual channel, dip-8
www.vishay.com 2 document number 82584 rev. 1.8, 13-aug-04 6n137/ sfh6741 / 42 / 50 / 51 / 52 vishay semiconductors truth table (positive lo g ic) absolute maximum ratin g s t amb = 25 c, unless otherwise specified stresses in excess of the absolute maximum ratings can caus e permanent damage to the device. functional operation of the device is not implied at these or any other conditions in excess of thos e given in the operational sections of this document. exposure to absolute maximum rating for extended periods of the time can adversely affect reliability. input 1) package: single dip-8 2) package: dual dip-8 output 1) package: single dip-8 2) package: dual dip-8 coupler 1) package: dip-8 through hole 2) package: dip-8 smd sfh6751-x006 5 k v / s, dual channel, dip-8 400 mil (option 6) sfh6751-x007 5 k v / s, dual channel, smd-8 (option 7) sfh6752 10 k v / s, dual channel, dip-8 sfh6752-x006 10 k v / s, dual channel, dip-8 400 mil (option 6) sfh6752-x007 10 k v / s, dual channel, smd-8 (option 7) part remarks led enable output on h l off h h on l h off l h on nc l off nc h parameter test condition symbol v alue unit average forward current 1) i f 20 ma average forward current 2) i f 15 ma reverse input voltage v r 5 v enable input voltage 1) v e v cc + 0.5 vv enable input current 1) i e 5ma surge current t = 100 si fsm 200 ma parameter test condition symbol v alue unit supply voltage 1 minute max. v cc 7 v output current i o 50 ma output voltage v o 7 v output power dissipation 1) p diss 85 mw output power dissipation per channel 2) p diss 60 mw parameter test condition symbol v alue unit storage temperature t stg - 55 to + 150 c operating temperature t amb - 40 to + 100 c lead solder temperature 1) for 10 sec. 260 c solder reflow temperature 2) for 1 minute 260 c isolation test voltage t = 1.0 sec. v iso 5300 v rms
6n137/ sfh6741 / 42 / 50 / 51 / 52 document number 82584 rev. 1.8, 13-aug-04 vishay semiconductors www.vishay.com 3 recommended operatin g conditions electrical characteristics t amb = 25 c and v cc = 5.5 v , unless otherwise specified minimum and maximum values are testing requirements. typical va lues are characteristics of t he device and are the result of eng ineering evaluation. typical values are for information only and are not part of the testing requirements. input output parameter test condition symbol min typ. max unit operating temperature t amb - 40 100 c supply voltage v cc 4.5 5.5 v input current low level i fl 0 250 a input current high level i fh 515ma logic high enable voltage v eh 2.0 v cc v logic low enable voltage v el 0.0 0.8 v output pull up resistor r l 330 4 k ? fanout r l = 1 k ? n5- parameter test condition symbol min typ. max unit input forward voltage i f = 10 ma v f 1.1 1.4 1.7 v reverse current v r = 4.5 v i r 1 a input capacitance f = 1 mhz, v f = 0 v c i 55 pf parameter test condition symbol min typ. max unit high level supply current (single channel) v e = 0.5 v , i f = 0 ma i cch 4.1 7.0 ma v e = v cc , i f = 0 ma i cch 3.3 6.0 ma high level supply current (dual channel) i f = 0 ma i cch 8.2 14.0 ma low level supply current v e = 0.5 v , i f = 10 ma i ccl 4.0 7.0 ma v e = v cc , i f = 10 ma i ccl 3.3 6.0 ma high level output current v e = 2.0 v , v o = 5.5 v , i f = 250 ai oh 0.002 1 a low level output voltage v e = 2.0 v , i f = 5 ma, i ol (sinking) = 13 ma v ol 0.2 0.6 v input threshold current v e = 2.0 v , v o = 5.5 v , i ol (sinking) = 13 ma i th 2.4 5.0 ma high level enable current v e = 2.0 v i eh - 0.6 - 1.6 ma low level enable current v e = 0.5 v i el - 0.8 - 1.6 ma high level enable voltage v eh 2.0 v low level enable voltage v el 0.8 v
www.vishay.com 4 document number 82584 rev. 1.8, 13-aug-04 6n137/ sfh6741 / 42 / 50 / 51 / 52 vishay semiconductors switchin g characteristics over recommended temperature (t a = - 40 to + 100 c), v cc = 5 v , i f = 7.5 ma unless otherwise specified. all typicals at t a = 25 c, v cc = 5 v . * 75ns applies to the 6n137 only, a jedec registered specification parameter test condition symbol min typ. max unit propagation delay time to high output level r l = 350 ? , c l = 15 pf t plh 20 48 75 * ns t plh 100 ns propagation delay time to low output level r l = 350 ? , c l = 15 pf t phl 25 50 75 * ns t phl 100 ns pulse width distortion r l = 350 ? , c l = 15 pf | t phl - t plh | 2.9 35 ns propagation delay skew r l = 350 ? , c l = 15 pf t psk 840ns output rise time (10 - 90 %) r l = 350 ? , c l = 15 pf t r 23 ns output fall time (90 - 10 %) r l = 350 ? , c l = 15 pf t f 7ns propagation delay time of enable from v eh to v el r l = 350 ? , c l = 15 pf, v el = 0 v , v eh = 3 v t elh 12 ns propagation delay time of enable from v el to v eh r l = 350 ? , c l = 15 pf, v el = 0 v , v eh = 3 v t ehl 11 ns figure 1. single channel test circuit for t plh , t phl , t r and t f 1 2 3 4 8 7 6 5 1 8 964-1 the pro b e and jig capacitances are incl u ded in c inp u ti f o u tp u tv o i f 0ma v oh 1.5 v t plh t phl v ol c = 15 pf g n d 0.1 f bypass v cc v out v cc i f r r l 5v inp u ti f monitoring n ode o u tp u tv o monitoring n ode l single channel p u lse gen. z=50 ? t =t =5ns o f r m l = 7.5 ma i f =3.75ma v e
6n137/ sfh6741 / 42 / 50 / 51 / 52 document number 82584 rev. 1.8, 13-aug-04 vishay semiconductors www.vishay.com 5 figure 2. dual channel test circuit for t plh , t phl , t r and t f figure 3. single channel test circuit for t ehl and t elh 1 2 3 4 8 7 6 5 g n d v cc p u lse gen. z=50 ? t =t =5ns o f r inp u t monitoring n ode d u al channel o u tp u tv monitoring n ode o i f r m r l c l =15pf 0.1 f bypass +5v 1 8 963-1 1 2 3 4 8 7 6 5 1 8 975-1 the pro b e and jig capacitances are incl u ded in c inp u tv e o u tp u tv o t ehl t elh c = 15 pf g n d 0.1 f bypass v cc v out v cc i f r l 5v o u tp u tv o monitoring n ode l single channel p u lse gen. z=50 ? t =t =5ns o f r l 7.5 ma inp u tv monitoring n ode e 3v 1.5 v 1.5 v v e
www.vishay.com 6 document number 82584 rev. 1.8, 13-aug-04 6n137/ sfh6741 / 42 / 50 / 51 / 52 vishay semiconductors common mode transient immunity 1) for 6n137 and sfh6750 2) for sfh6741 and sfh6751 3) for sfh6742 and sfh6752 parameter test condition symbol min typ. max unit common mode transient immunity (high) | v cm | = 10 v , v cc = 5 v , i f = 0 ma, v o(min) = 2 v , r l = 350 ? , t amb = 25 c 1) | cm h | 100 v / s | v cm | = 50 v , v cc = 5 v , i f = 0 ma, v o(min) = 2 v , r l = 350 ? , t amb = 25 c 2) | cm h | 5000 10000 v / s | v cm | = 1 k v , v cc = 5 v , i f = 0 ma, v o(min) = 2 v , r l = 350 ? , t amb = 25 c 3) | cm h | 10000 15000 v / s | v cm | = 10 v , v cc = 5 v , i f = 7.5 ma, v o(max) = 0.8 v , r l = 350 ? , t amb = 25 c 1) | cm l | 100 v / s | v cm | = 50 v , v cc = 5 v , i f = 7.5 ma, v o(max) = 0.8 v , r l = 350 ? , t amb = 25 c 2) | cm l | 5000 10000 v / s | v cm | = 1 k v , v cc = 5 v , i f = 7.5 ma, v o(max) = 0.8 v , r l = 350 ? , t amb = 25 c 3) | cm l | 10000 15000 v / s figure 4. single channel test circuit for common mode transient immunity v cm (peak) s w itch at a: i = 0 ma f s w itch at a: i = 7.5 ma f v o (min.) v o (max.) 0v 5v v v cm v o v o 0.5 cm h cm l 1 2 3 4 8 7 6 5 1 8 976-1 g n d 0.1 f bypass v cc v out v cc r l 5v o u tp u tv o monitoring n ode + - v cm single channel b a v ff i f p u lse generator z=50 ? o v e
6n137/ sfh6741 / 42 / 50 / 51 / 52 document number 82584 rev. 1.8, 13-aug-04 vishay semiconductors www.vishay.com 7 safety and insulation ratin g s as per iec60747-5-2, 7.4.3.8.1, this optocoupler is suitable fo r "safe electrical insulation" only within the safety ratings. compliance with the safety ratings shall be ensured by means of protective circuits. typical characteristics (tamb = 25 c unless otherwise specified) figure 5. dual channel test circuit for common mode transient immunity parameter test condition symbol min typ. max unit climatic classification (according to iec 68 part 1) 55/110/21 comparative tracking index cti 175 399 v iotm 8000 v v iorm 630 v p si 500 mw i si 300 ma t si 175 c creepage standard dip-8 7 mm clearance standard dip-8 7 mm creepage 400mil dip-8 8 mm clearance 400mil dip-8 8 mm insulation thickness, reinforced rated per iec60950 2.10.5.1 0.2 mm 1 2 3 4 8 7 6 5 1 8 977 g n d 0.1 f bypass v cc r l +5v o u tp u tv o monitoring n ode + - v cm b a v ff i f p u lse generator z=50 ? o d u al channel figure 6. forward v oltage vs. ambient temperature 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 C40 C20 0 20 40 60 80 100 t amb C ambient temperature ( c ) 17610 i f = 50 ma i f = 10 ma i f = 20 ma i f = 1 ma v C forward voltage ( v ) f figure 7. forward v oltage vs. forward current 1.10 1.15 1.20 1.25 1.30 1.35 1.40 1.45 1.50 1.55 1.60 0 5 10 15 20 25 30 35 40 45 50 i f ? for w ard c u rrent ( ma ) 17611 v ? for w ard voltage ( v ) f
www.vishay.com 8 document number 82584 rev. 1.8, 13-aug-04 6n137/ sfh6741 / 42 / 50 / 51 / 52 vishay semiconductors figure 8. reverse current vs. ambient temperature figure 9. low level supply current vs. ambient temperature figure 10. high level supply current vs. ambient temperature 0 1 2 3 4 5 6 7 ?40 ?20 0 20 40 60 8 0 100 i ? re v erse c u rrent ( na ) r t am b ? am b ient temperat u re ( c ) 17613-1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 ?40 ?20 0 20 40 60 8 0100 i ? lo w le v el s u pply c u rrent ( ma ) ccl t am b ? am b ient temperat u re ( c ) 17614 v cc = 5 v i f = 10 ma v cc = 7 v i f = 10 ma 2. 8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 ?40 ?20 0 20 40 60 8 0100 i ? high le v el s u pply c u rrent ( ma ) cch t am b ? am b ient temperat u re ( c ) 17615 v cc = 5 v i f = 0.25 ma v cc = 7 v i f = 0.25 ma figure 11. input threshold on current vs. ambient temperature figure 12. input threshold off current vs. ambient temperature figure 13. low level output v oltage vs. ambient temperature 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2. 8 ?40 ?20 0 20 40 60 8 0100 i ? inp u t threshold o n c u rrent ( a ) th t am b ? am b ient temperat u re ( c ) 17616 r l = 350 r l = 1 k r l = 4 k 2.0 2.1 2.2 2.3 2.4 2.5 2.6 ?40 ?20 0 20 40 60 8 0100 i ? inp u t threshold off c u rrent ( a ) th t am b ? am b ient temperat u re ( c ) 17617 r l = 350 r l = 1 k r l = 4 k 0.00 0.05 0.10 0.15 0.20 0.25 0.30 ?40 ?20 0 20 40 60 8 0100 v ? lo w le v el o u tp u t voltage ( v ) ol t am b ? am b ient temperat u re ( c ) 1761 8 i l = 6 ma i l = 10 ma i l = 13 ma i l = 16 ma v cc = 5.5 v i f = 5 ma
6n137/ sfh6741 / 42 / 50 / 51 / 52 document number 82584 rev. 1.8, 13-aug-04 vishay semiconductors www.vishay.com 9 figure 14. low level output current vs. ambient temperature figure 15. high level output current vs. ambient temperature figure 16. output v oltage vs. forward input current 0 10 20 30 40 50 60 C40 C20 0 20 40 60 80 100 i C low level output current ( ma ) ol t amb C ambient temperature (  c ) 17619 i f = 5 ma i f = 10 ma 0 5 10 15 20 25 30 35 40 45 50 ?40 ?20 0 20 40 60 8 0100 i ? high le v el o u tp u t c u rrent ( na ) oh t am b ? am b ient temperat u re ( c ) 17620 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 012345 v C output voltage ( v ) o i f C forward input current ( ma ) 17621 r l = 350  r l = 1 k  r l = 4 k  figure 17. propagation delay vs. ambient temperature figure 18. propagation delay vs. forward current figure 19. pulse width distortion vs. ambient temperature 0 20 40 60 80 100 120 C40 C20 0 20 40 60 80 100 t amb C ambient temperature ( c ) 17622 t C propagation delay time ( ns ) p t plh, 350 ? t phl, 350 ? t plh, 1 k ? t phl, 1 k ? t plh, 4 k ? t phl, 4 k ? 0 20 40 60 80 100 120 5 7 9 11 13 15 i f C forward current ( ma ) 17623 t C propagation delay time ( ns ) p t plh, 350 ? t phl, 350 ? t plh, 1 k ? t phl, 1 k ? t plh, 4 k ? t phl, 4 k ? 0 10 20 30 40 50 ?40 ?20 0 20 40 60 8 0100 t am b ? am b ient temperat u re ( c ) 17624 p w d ? p u lse w idth distortion ( ns ) r l = 350 ? r l = 1 k ? r l = 4 k ?
www.vishay.com 10 document number 82584 rev. 1.8, 13-aug-04 6n137/ sfh6741 / 42 / 50 / 51 / 52 vishay semiconductors figure 20. pulse width distortion vs. forward current figure 21. rise and fall time vs. ambient temperature figure 22. rise and fall time vs. forward current 0 10 20 30 40 50 60 5 7 9 11 13 15 i f ? for w ard c u rrent ( ma ) 17625 p w d ? p u lse w idth distortion ( ns ) r l = 350 ? r l = 1 k ? r l = 4 k ? 0 50 100 150 200 250 300 C40 C20 0 20 40 60 80 100 t amb C ambient temperature ( c ) 17626 t C rise and fall time ( ns ) t r , r l = 4 k ? r,f t r , r l = 350 ? t f , r l = 350 ? t f , r l = 4 k ? t r , r l = 1 k ? t f , r l = 1 k ? 0 50 100 150 200 250 300 5 7 9 11 13 15 i f C forward current ( ma ) 17627 t C rise and fall time ( ns ) t r , r l = 4 k ? r,f t r , r l = 350 ? t f , r l = 350 ? t f , r l = 4 k ? t r , r l = 1 k ? t f , r l = 1 k ? figure 23. enable propagation dela y vs. ambient temperature 0 10 20 30 40 50 60 ?40 ?20 0 20 40 60 8 0100 t am b ? am b ient temperat u re ( c ) 1762 8 t ? ena b le propagation delay ( ns ) t elh = 4 k ? e t elh = 350 ? t ehl = 350 ? t ehl = 4 k ? t elh = 1 k ? t ehl = 1 k ?
6n137/ sfh6741 / 42 / 50 / 51 / 52 document number 82584 rev. 1.8, 13-aug-04 vishay semiconductors www.vishay.com 11 packa g e dimensions in inches (mm) i17 8 006 pin one id .255 (6.4 8 ) .26 8 (6. 8 1) . 3 79 (9.6 3 ) . 3 90 (9.91) .0 3 0 (0.76) .045 (1.14) 4 typ. .100 (2.54) typ. 10 3 C9 . 3 00 (7.62) typ. .01 8 (.46) .022 (.56) .00 8 (.20) .012 (. 3 0) .110 (2.79) .1 3 0( 3 . 3 0) .1 3 0( 3 . 3 0) .150 ( 3 . 8 1) .020 (.51 ) .0 3 5(. 8 9) .2 3 0(5. 8 4) .250(6. 3 5) 4 3 2 1 .0 3 1 (0.79) .050 (1.27) 5 6 7 8 iso method a min. . 3 15 ( 8 .00) .020 (.51) .040 (1.02) . 3 00 (7.62) ref. . 3 75 (9.5 3 ) . 3 95 (10.0 3 ) .012 (. 3 0) typ. .0040 (.102) .009 8 (.249) 15 m a x. option 9 .014 (0. 3 5) .010 (0.25) .400 (10.16) .4 3 0 (10.92) . 3 07 (7. 8 ) .291 (7.4) .407 (10. 3 6) . 3 91 (9.96) option 6 . 3 15 ( 8 .0) min. . 3 00 (7.62) typ . .1 8 0 (4.6) .160 (4.1) . 33 1( 8 .4) min. .406 (10. 3 ) max. .02 8 (0.7) min. option 7 1 8 450
www.vishay.com 12 document number 82584 rev. 1.8, 13-aug-04 6n137/ sfh6741 / 42 / 50 / 51 / 52 vishay semiconductors ozone depletin g substances policy statement it is the policy of v ishay semiconductor gmbh to 1. meet all present and future national and international statutory requirements. 2. regularly and continuously improve the performance of our products, processes, distribution and operatingsystems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. it is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (odss). the montreal protocol (1987) and its london amendments (1990) intend to severely restrict the use of odss and forbid their use within the next ten years. v arious national and international initiatives are pressing for an earlier ban on these substances. v ishay semiconductor gmbh has been able to use its policy of continuous improvements to eliminate the use of odss listed in the following documents. 1. annex a, b and list of transitional substances of the montreal protocol and the london amendments respectively 2. class i and ii ozone depleting substances in the clean air act amendments of 1990 by the environmental protection agency (epa) in the usa 3. council decision 88/540/eec and 91/690/eec annex a, b and c (transitional substances) respectively. v ishay semiconductor gmbh can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. we reserve the right to make changes to improve technical design and may do so without further notice. parameters can vary in different applications. all operating parameters must be validated for each customer application by the customer. should the buyer use v ishay semiconductors products for any unintended or unauthorized application, the buyer shall indemnify v ishay semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. v ishay semiconductor gmbh, p.o.b. 3535, d-74025 heilbronn, germany telephone: 49 (0)7131 67 2831, fax number: 49 (0)7131 67 2423
6n137/ sfh6741 / 42 / 50 / 51 / 52 document number 82584 rev. 1.8, 13-aug-04 vishay semiconductors www.vishay.com 13


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